1. Field of the Invention
The present invention relates to a solid-state image sensing device for sensing an input one- or two-dimensional optical image.
2. Related Background Art
Image sensing devices using solid-state image sensing elements represented by a charge-coupled device (CCD) are used in various fields including home video cameras. However, when a CCD is used as an image sensing element having a relatively large light-receiving area, charges cannot be sufficiently transferred because of the low charge transfer efficiency of the CCD. Hence, of solid-state image sensing devices, MOS image sensors are used in specific fields because they have no problem of charge transfer efficiency.
A MOS image sensor for sensing a one- or two-dimensional optical image conventionally employs a scheme in which one discrete amplifier is arranged for a one- or two-dimensional photodiode array, and a photodetection signal from each photodiode is amplified and then extracted. In recent years, there is proposed an optical sensor device which maintains a linear photoelectric conversion characteristic even in an area with a small light amount in a short read time while exploiting the advantages of the MOS image sensor.
In this device, the output from a photodiode is read through a charge amplification circuit and source follower circuit (xe2x80x9cJapanese Patent Laid-Open No. 5-215602 (prior art 1)xe2x80x9d, and xe2x80x9cJ. C. Stanton, IEEE Transactions on Nuclear Science, Vol. 36, No 1, February 1989, pp. 522-527 (prior art 2)xe2x80x9d.
FIG. 4 is a circuit diagram of a device disclosed in prior art 1. A device disclosed in prior art 2 also substantially has the same circuit arrangement as that of prior art 1. As shown in FIG. 4, the device comprises (a) sensors 9301 to 930N each having a photodiode 910 and charge amplification circuit 920 for receiving a photodetection signal output from the photodiode 910 and integrating charges, and (b) a buffer circuit 970 having a clamp circuit 950 for receiving a signal output from a sensor 930i alternatively selected by a scanning circuit 940 and clamping the signal and a source follower circuit 960 for receiving the signal output from the clamp circuit 950 and generating a source follower output.
In this device, the charge amplification circuit 920 receives a current signal by charges generated in accordance with light incidence on the photodiode 910 and integrates the charges. An integration signal as a signal output from the sensor 930i alternatively selected in accordance with a scanning instruction signal output from the scanning circuit 940 is sequentially obtained through the clamp circuit 950 and then through the source follower circuit 960.
In the above optical sensor device, when a two-dimensional image sensor or an image sensor having a one-dimensional array of photodiodes each paired with a signal processing circuit is formed, the following problems are posed.
(1) Problem of Linearity
In the device shown in FIG. 4, by the source follower circuit 960 of the MOSFET, the charge integration result output from the charge amplification circuit 920 is input from the gate of the MOSFET and output to an external circuit from the source of the MOSFET. Hence, letting VG be the gate potential, and VS be the source potential,
VS=VGxe2x88x92Vthxe2x88x92(2I/Kp)1/2xe2x80x83xe2x80x83(1)
holds, where
Vth: threshold voltage of the MOSFET
I: drain current of the MOSFET
Kp: Constant based on manufacturing parameters and size of the MOSFET
The value Vth varies depending on the source potential VS. Hence,
Vth=Vth0+xcex3((VS+Vb)1/2xe2x88x92Vb1/2)xe2x80x83xe2x80x83(2)
where
Vth0: threshold voltage unique to the MOSFET
xcex3: substrate constant unique to the MOSFET
Vb: base potential of the MOSFET
The base potential Vb is generally fixed to a predetermined potential by, e.g., grounding it for an NMOS.
As is apparent from equations (1) and (2), it is difficult to maintain a linear relationship between the gate potential VG, i.e., integration result signal and the source potential VS, i.e., output signal.
To prevent this, when interconnection is done such that the well potential of the MOSFET becomes the source potential VS, the parasitic capacitance largely increases due to the well, resulting in difficulty in high-speed operation.
(2) Problem of Operation Speed
In the device shown in FIG. 4, when the sensor 930i is selected by the scanning circuit 940, the parasitic capacitance of the source terminal is immediately charged up to obtain the source potential VS shown in equation (1). To increase the charge-up speed of the parasitic capacitance of the source terminal for a high-speed operation, the value of steady-state current flowing to the source follower circuit must be increased.
However, when the value of steady-state current is increased, the voltage value between the gate and the source in the source follower circuit increases. As a result, the dynamic range of the output signal voltage narrows.
If the MOSFET size is increased to solve the above problem, the parasitic capacitance also increases, resulting in difficulty in high-speed operation.
That is, the device shown in FIG. 4 cannot simultaneously realize high-speed operation and ensure the dynamic range of the output. This problem especially becomes serious when the constituent elements are integrated as an array.
The present invention has been made in consideration of the above situation, and has as its object to provide a solid-state image sensing device which enables high-speed operation while sufficiently ensuring the dynamic range of the output signal and reduces power consumption even when the elements are integrated.
In order to achieve the above object, according to the present invention, there is provided a solid-state image sensing device for sensing an input optical image, characterized by comprising (1) a light-receiving section in which the first number of light-receiving elements are arrayed along a first direction, each light-receiving element including a photoelectric conversion element for converting an input optical signal into a current signal and a switch element having a first terminal connected to a signal output terminal of the photoelectric conversion element and a second terminal for outputting the current signal generated by the photoelectric conversion element in accordance with a vertical scanning signal, and the second number of vertical light-receiving sections each having a signal output terminal electrically connected to the second terminals of the switch elements of the respective light-receiving elements are arrayed along a second direction, (2) the second number of integration circuits each for individually receiving an output from a corresponding one of the vertical light-receiving sections and performing an integration or non-integration operation of the current signal output from the vertical light-receiving section in a first capacitive element connected between an input and output terminals in accordance with a reset instruction signal, (3) the second number of sample-and-hold circuits each for receiving the signal output from a corresponding one of the integration circuits and performing a charge sample operation or charge hold operation for a second capacitive element in accordance with a sample instruction signal, (4) the second number of drive circuits each for receiving the signal output from a corresponding one of the sample-and-hold circuits and controlling an output drive ability in accordance with a horizontal scanning signal, (5) the second number of horizontal read circuits each for receiving the signal output from a corresponding one of the drive circuits and selectively outputting the signal in accordance with the horizontal scanning signal, and (6) a timing control section for issuing the vertical scanning signal, reset instruction signal, sample instruction signal, and horizontal scanning signal, wherein (7) the drive circuit comprises a differential amplifier, a current controller formed from a MOSFET to control a current from a constant voltage terminal, and a drive ability control circuit, the differential amplifier is arranged while having a positive input terminal connected to an output from the sample-and-hold circuit and a negative input terminal connected to an input to the horizontal read circuit, the current controller is arranged between the constant voltage terminal and the negative input terminal of the differential amplifier while having a gate terminal connected to an output terminal of the differential amplifier, the drive ability control circuit is connected to the negative input terminal of the differential amplifier, and when the horizontal scanning signal is insignificant to disable output, the output drive ability of the drive circuit is set in a low state through the drive ability control circuit, and when the horizontal scanning signal is significant to enable output, the output drive ability is set in a high state through the drive ability control circuit.
In such a solid-state image sensing device, first a current signal is output from the first light-receiving element of each vertical light-receiving section for which output is instructed by the vertical scanning signal. More specifically, after the reset instruction signal is temporarily set in the significant state, a vertical scanning signal for turning on only the switch element of the first light-receiving element in vertical scanning of each vertical light-receiving section is output. When the switch element is turned on, charges stored in the photoelectric conversion element by light reception so far are output from the light-receiving section as a current signal. The charges are instantaneously stored in the feedback capacitance by the integration circuit and output as a voltage. The signal output from the integration circuit is input to the sample-and-hold circuit.
The sample-and-hold circuit stores a charge amount corresponding to the charge amount stored in the photoelectric conversion element in accordance with the sample instruction signal, and outputs the charges to the drive circuit. Almost at the end of sampling operation, the vertical scanning signal is set not to select any light-receiving element.
Next, the horizontal scanning signal is set to sequentially alternatively select the horizontal read circuit and instruct the drive circuit corresponding to the vertical light-receiving section as a read target to switch to the high output drive ability state, and a detection signal corresponding to the first light-receiving element of each vertical light-receiving section is sequentially read.
In this way, the start of signal read and switching of the output drive ability are synchronized by the horizontal scanning signal. Hence, when no read is performed, the output drive ability is set to be low such that the solid-state image sensing device operates at low power consumption. When a read is to be performed, the output drive ability is set to be high to increase power consumption, thereby realizing a high-speed signal read. Hence, a solid-state image sensing device capable of a high-speed read operation and having low power consumption can be obtained.
Especially, when the current controller formed from a MOSFET for switching the drive ability and a drive ability control circuit are set independently of the differential amplifier and used to switch the output drive ability, a solid-state image sensing device which sufficiently ensures a dynamic range while maintaining the linearity of the output signal and can perform a high-speed operation can be obtained.
The reset instruction signal is set in the significant state until the signal read corresponding to the first light-receiving element of each vertical light-receiving section is ended after the completion of the sampling operation.
When the signal read for the first light-receiving element of each vertical light-receiving section is ended, the horizontal scanning signal is set not to output a signal corresponding to any vertical light-receiving section, the reset instruction signal is set in the insignificant state, and then, operation for the second light-receiving element of each vertical light-receiving section is started. By the same operation as described above, signals from the light-receiving elements of each vertical light-receiving section are sequentially read, thereby collecting signal data from all the light-receiving elements.
The present invention will be more fully understood from the detailed description given hereinbelow and the accompanying drawings, which are given by way of illustration only and are not to be considered as limiting the present invention.
Further scope of applicability of the present invention will become apparent from the detailed description given hereinafter. However, it should be understood that the detailed description and specific examples, while indicating preferred embodiments of the invention, are given by way of illustration only, since various changes and modifications within the spirit and scope of the invention will be apparent to those skilled in the art from this detailed description.